* Negative Edge Pulse Detector
VCC 5 0 5V
VIN 1 0 PWL(0ms 5 10ms 5 10.01ms 0 20ms 0 20.01ms 5 )
C1  2 1 .1u
R1  2 0 10k
R2  2 5 1k
XNAND1 7 2 3 5 0 NAND
C2  3 4 1u
R3  4 0 100k
XNAND2 5 4 7 5 0 NAND
.SUBCKT NAND 1 2 3 5 6
M1 3 1 5 5 PMOS1
M2 3 2 5 5 PMOS1
M3 3 1 4 4 NMOS1
M4 4 2 6 6 NMOS1
C1 3 6 0.01p
.ENDS
.MODEL NMOS1 NMOS
.MODEL PMOS1 PMOS
.OP
.TRAN 0.5ms 100ms
.PRINT TRAN v(3)+12 v(2)+6 v(1)
.PRINT TRAN v(3)+12 v(2)+6 v(1)
.END
.